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* 15.1: BIST-RM: BIST-Assisted Reliability Management of SoCs Using On-Chip Clock Sweeping and Machine Learning
M. Sadi, University of Florida

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* 15.2: Efficient Cross-Layer Concurrent Error Detection In Nonlinear Control Systems Using Mapped Predictive Check States
S. Banerjee, Georgia Institute of Technology

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* 15.3: Cross-Layer System Reliability Assessment Against Hardware Faults
A. Vallero, Politecnico di Torino;

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