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* 17.1: Automated Measurement of Defect Tolerance in Mixed-Signal ICs
Presenter: S. Sunter, Mentor Graphics

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* 17.2: Automatic Test Signal Generation for Mixed-Signal Integrated Circuits Using Circuit Partitioning and Interval Analysis
A. Coyette, KU Leuven

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* 17.3: DE-LOC: Design Validation and Debugging with Limited Observation and Control, Pre- and Post-Silicon, for Mixed-Signal Systems
B. Muldrey, Georgia Institute of Technology

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