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* S1.1: DFT Test Considerations for Low- Power Devices
T. McLaurin, ARM

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* S1.2: Scan-based Low Power Test Generation
X. Lin, Mentor Graphics

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* S1.3: Got the Power? Test and DFT of Mobile Power Management ICs (PMICs)
H. von Staudt, Dialog Semiconductor




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* S1.4: Transient Testing of Integrated Power Output Stages
W-T. Ng, University of Toronto

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